Department of Electrical and Computer Engineering

The University of Texas at Austin

EE 306, Fall 2014
Problem Set 2
Due: September 22th, at the beginning of class
Aater Suleman, Instructor
TAs: Owais Khan, Cagri Eryilmaz and Chirag Sakhuja

Instructions:
You are encouraged to work on the problem set in groups and turn in one problem set for the entire group. Remember to put all your names on the solution sheet. Also, remember to put the name of the TA and the time for the discussion section you would like the problem set turned back to you. Show your work.

  1. (2.3)
    1. Assume that there are about 400 students in your class. If every student is to be assigned a unique bit pattern, what is the minimum number of bits required to do this?
    2. How many more students can be admitted to the class without requiring additional bits for each student's unique bit pattern?

  2. (Adapted from 2.13)
    Without changing their values, convert the following 2's complement binary numbers into 8-bit 2's complement numbers.
    1. 010110
    2. 1101
    3. 1111111000
    4. 01

  3. (Adapted from 2.17)
    Compute the following. Assume each operand is a 2's complement binary number.
    1. 01 + 1011
    2. 11 + 01010101
    3. 0101 + 110
    4. 01 + 10

  4. Express the value 0.3 in the 32-bit floating point format that we discussed in class today. Feel free to only show fraction bits [22:15], rather than all the fraction bits, [22:0]. Notation: The symbol [22:15] signifies all 8 bits from bit 22 to bit 15.

  5. Convert the following floating point representation to its decimal equivalent: 1 10000010 10101001100000000000000

  6. (Adapted from 2.50)

    Perform the following logical operations. Express your answers in hexadecimal notation.

  7. (2.54)

    Fill in the truth table for the equations given. The first line is done as an example.
    Q1 = NOT (NOT(X) OR (X AND Y AND Z))
    Q2 = NOT ((Y OR Z) AND (X AND Y AND Z))

  8. X    Y    Z 
    Q1    Q2 
    0    0    0
    0      1
               
            
               
            
               
            
               
            
               
            
               
            
               
            

  9. Professor Patt is trying to decide when he should shave his beard. Your job is to design a logic circuit whose output Y is equal to 1 when Professor Patt should shave his beard, and 0 when he should not. The circuit will receive three input variables (A, B, C) that answer three different yes/no questions (1=yes, 0=no).

    A<=Has Professor Patt been uncomfortably warm this summer?
    B<=Does Professor Patt want a new, fresher look?
    C<=Are beards “cool”?

    We think that Professor Patt should shave his beard if he has been uncomfortably warm this summer. He should also shave his beard if he wants a new fresher look and beards are not “cool”.
    Write the logic equation for Y in terms of A,B,C that solves this problem, and draw the gate-level diagram.

    1. (3.11) Draw a transistor-level diagram for a three-input AND gate and a three-input OR gate. Do this by extending the designs from Figures 3.6a and 3.7a. (Figures can be found in the book on pages 56 & 57 respectively).
    2. Replace the transistors in your diagrams from part (a) with either a wire or no wire to reflect the circuit’s operation when the following inputs are applied:
        A = 1, B = 0, C = 0
    3. The transistor circuit shown below produces the accompanying truth table. The inputs to some of the gates of the transistors are not specified. Also, the outputs for some of the input combinations of the truth table are not specified. Complete both specifications. i.e., all transistors will have their gates properly labeled with either A, B, or C, and all rows of the truth table will have a 0 or 1 specified as the output.

      Figure 1


  10. Shown below are several logical identities with one item missing in each. X represents the case where it can be replaced by either a 0 or a 1 and the identity will still hold. Your job: Fill in the blanks with either a 0, 1, or X.

    For example, in part a, the missing item is X. That is 0 OR 0 = 0 and 0 OR 1 = 1.

    1. 0 OR X = ___
    2. 1 OR X = ___
    3. 0 AND X = ___
    4. 1 AND X = ___
    5. __ XOR X = X

  11. Draw a transistor-level diagram for a 2-input OR gate. Do not build an OR gate by connecting a NOR gate with a NOT gate.